Job Description

SEAKR is seeking a Verification Engineer who is responsible for developing verification and simulation strategies, conducting design reviews, creating a digital test plan and providing coverage metrics. 

• The Engineer is responsible for the construction and maintenance of simulation environments using System Verilog with UVM (Universal Verification Methodology), and performing and evaluating regression tests for a design under test. 
• The candidate must be able to extract and derive test requirements and sequences for an interface or interfaces based on available design documentation and requirements. 
• Ability to architect and construct full test environments for simple devices using UVM, including coverage, is required. 
• The candidate shall be capable of diagnosing sophisticated test failures and filing results
• Ability to analyze Verilog RTL to diagnose test failures is required. 
• Ability to perform and evaluate regression tests for a design under test is a plus. 
• Ability to use simulation tools such as Mentor Graphics Modelsim/Questasim for simulation debug and reporting is required. 
• Must be able to work effectively under pressure to meet tight deadlines. 

Qualifications

• A Bachelors degree in Electrical Engineering or Computer Science is required, a Master's Degree is preferred.
• At least 7 years of verification engineering experience are required. 

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Job Description

SEAKR is currently seeking a Verification Engineer who is responsible for developing verification and simulation strategies, conducting design reviews, creating a digital test plan and providing coverage metrics. 

• The Engineer is responsible for the construction and maintenance of simulation environments using System Verilog with UVM (Universal Verification Methodology), and performing and evaluating regression tests for a design under test. 
• The candidate must be able to extract and derive test requirements and sequences for an interface or interfaces based on available design documentation and requirements. 
• Ability to architect and construct full test environments for complex devices using UVM, including coverage, is required. 
• The candidate shall be capable of diagnosing sophisticated test failures and filing results, and be capable of analyzing code coverage to adjust agent sequence behavior. 
• Ability to provide direction to less senior verification engineers is required. 
• Ability to lead a team of verification engineers to fully verify a device is required. 
• Ability to use simulation tools such as Mentor Graphics Modelsim/Questasim for simulation debug and reporting is required. 
• Ability to analyze Verilog RTL to diagnose test failures is required. 
• Ability to analyze VHDL is a plus. 
• Must be able to work effectively under pressure to meet tight deadlines. 
• Experience verifying DSP related designs a plus.

Qualifications

• A Bachelors degree in Electrical Engineering or Computer Science . A Master's Degree is preferred. 
• A minimum of 10 years of verification engineering experience are required

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Job Description

SEAKR is seeking a Verification Engineer who is responsible for developing verification and simulation strategies, conducting design reviews, creating a digital test plan and providing coverage metrics. 

• The Engineer is responsible for the construction and maintenance of simulation environments using System Verilog with UVM (Universal Verification Methodology), and performing and evaluating regression tests for a design under test. 
• The candidate must be able to extract and derive test requirements and sequences for an interface or interfaces based on available design documentation and requirements. 
• Ability to architect and construct full test environments for simple devices using UVM, including coverage, is required. 
• The candidate shall be capable of diagnosing sophisticated test failures and filing results and be capable of analyzing code coverage to adjust agent sequence behavior. 
• Ability to analyze Verilog RTL to diagnose test failures is required. 
• Ability to diagnose VHDL RTL is a plus. 
• Ability to perform and evaluate regression tests for a design under test is a plus. 
• Ability to use simulation tools such as Mentor Graphics Modelsim/Questasim for simulation debug and reporting is required. 
• Must be able to work effectively under pressure to meet tight deadlines. 
• Experience verifying DSP related designs is a plus.

Qualifications

• A Bachelors degree in Electrical Engineering or Computer Science. A Master's Degree is preferred.
• 4 to 6 years of verification engineering experience are required.

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Job Description

Candidates must be competent with analog low frequency circuit analysis techniques. Digital design experience is a plus. Candidate should have the ability to analyze switching and linear regulator power supply circuits along with their supervisory circuits. Analysis of A/D and D/A circuits with high frequency filter analysis is required. Experience with Pspice and MathCad software is required. Candidate must be able to write technical reports and document analyses. Candidate must be able to assist with validation of the analyses results in the lab. Knowledge of aerospace business and operations is a plus. Candidate must be able to work independently in the identification and coordination of analysis for programs and be able to organize and prioritize tasks and work on more than one task at a time.

Qualifications

• A Bachelor's degree in Electrical Engineering and at least 5 years of applicable experience are required.
• Knowledge of a variety of software systems including Word, E-mail, Excel, Pspice, Mathcad
• Ability to make decisions in accordance with company policies and practices.
• Ability to effectively analyze situations and recommend improvements.
• Ability to work independently in the identification and coordination of programs.
• Ability to prepare and maintain records and reports.
• Ability to organize and prioritize tasks.
• Ability to communicate effectively, both orally and in writing.
• Ability to establish good rapport with members of management and other employees.
• Ability to understand and follow written and oral instructions.
• Ability to work on more than one task at a time.
• Ability to operate the equipment listed below.
• Ability to work effectively under pressure to meet tight deadlines.
• Ability to proofread a variety of documents and to pay attention to detail.

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Job Description

Seeking a Digital Circuit Design Analyst responsible for performing digital circuit and timing analysis aimed at verifying that designs will perform as expected with margin over all environmental conditions

• Works closely with the Responsible Engineer to understand program performance, environmental requirements and analysis expectations
• Supports planning and execution of circuit, worst case timing, and parts stress analysis for digital designs
• Prepares and reviews required analysis documentation for submittal to customers according to program plans, which may include either SEAKR or customer specific format
• Supports internal and customer design reviews relative to digital circuit and worst case analyses
• Knowledge of the aerospace business and operations is a plus
• Previous digital design experience and knowledge of expected analysis techniques
• Able to write technical reports and document analyses
• Able to proofread a variety of documents and pay attention to detail
• Able to assist and mentor engineers on worst case analysis (WCA) methodologies and tools
• Knowledge of digital logic compatibility, power estimation, signal integrity analysis and power integrity analysis
• Able to work independently in the identification and coordination of analyses for programs
• Able to organize and prioritize tasks and work on more than one task at a time

Qualifications

Bachelor's degree in Electrical Engineering and at least 7 years of experience are required.

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